Semiconductor Technology from A to Z

Everything about semiconductors and wafer fabrication

1. General Structure

A transistor is an electronic semiconductor device that can be used for switching or amplifying current. Current flows through two terminals (drain, source), while the third (gate) is used for control. In addition to the field-effect transistor (FET), there is another fundamental type of transistor, the bipolar transistor. In this type, the terminals are called emitter (source in the FET), base (gate), and collector (drain). The bipolar transistor operates based on charge carriers of both polarities (hence bipolar), i.e. holes and electrons. In the field-effect transistor, also referred to as a unipolar transistor, depending on the design either electrons or holes participate in the transport of current.

The transistor described below is a so-called MOSFET (metal oxide semiconductor field-effect transistor). Although highly doped polysilicon is now typically used as the gate material rather than aluminium, the term MOSFET is still commonly used for this type of transistor. In this case, the term IGFET (insulated gate FET) would technically be more accurate. In newer transistors using high-k metal gate technology, however, the term MOSFET is once again correct, provided an oxide is still used as the insulator.

The transistor is the fundamental building block of semiconductor manufacturing; modern microchips contain several hundred billion transistors. By combining multiple transistors, all logic gates can be realized in order to generate the appropriate logical output signals from input signals. Transistors therefore form the core of every microprocessor, memory chip, and so on. The transistor is the technical component that has been produced by humankind in the greatest total quantity, and it has become indispensable in modern life.

During production, the transistor is built up layer by layer. The focus here is on the basic structure of a simple MOSFET; the various ways of realizing these layers are covered in later chapters.

The structure described here is the planar transistor: the gate lies flat on the surface of the wafer and controls the channel from above. This design shaped semiconductor technology for four decades and remains the correct starting point for understanding how the device works. In processes for the smallest structures, however, it has since been superseded, because a gate that acts from only one side can no longer reliably switch off the increasingly shorter channel. The chapter structure of a FinFET describes what its successors look like.

2. Fabrication of an n-Channel FET

1. Substrate

The basis for an n-channel field-effect transistor is a p-doped silicon substrate, using boron as the dopant.

p-substrate

2. Oxidation

Silicon dioxide SiO2 (the gate oxide, GOX for short) is grown on the substrate by dry oxidation. It insulates the gate, deposited later, from the substrate.

gate oxide

3. Deposition

Nitride is deposited in an LPCVD process; it later serves as a mask during field oxidation.

nitride deposition

4. Photolithography

A photoresist is applied on top of the nitride, exposed, and developed, producing a structured resist layer that serves as an etch mask.

photolithography on nitride

5. Etching

The resist masks the nitride; the exposed areas are removed by reactive ion etching.

nitride etching

6. Resist Removal

After the pattern has been transferred into the nitride, the resist is removed wet-chemically using a developer solution.

resist removal

7. Oxidation

The nitride acts as a mask; thermal wet oxidation occurs only where the nitride has been removed. The field oxide (FOX, e.g. 700 nm) provides lateral isolation from neighbouring devices.

field oxidation

8. Etching

After oxidation, the nitride is removed in a wet-chemical etching process.

nitride removal

9. Deposition

Polycrystalline silicon is deposited in an LPCVD process.

polysilicon deposition (gate electrode)

10. Photolithography

A resist layer is patterned on top of the polysilicon to serve as an etch mask.

photolithography on gate

11. Etching

The photoresist again acts as an etch mask, and the silicon is patterned in a reactive ion etch step, forming the gate electrode that controls the transistor.

gate patterning

12. Resist Removal

After etching, the resist is again removed wet-chemically.

resist removal after gate patterning

13. Oxidation

A thin oxide, the post-oxide, is deposited next. It protects the gate electrode and also acts as a spacer for the source/drain implantation.

post-oxidation

14. Ion Implantation

In an implantation step using phosphorus ions, the source and drain regions are n-doped. Since the gate electrode acts as an implantation mask, defining the width of the n-channel between source and drain, this is referred to as self-alignment. By adjusting the width of the spacers, the distance between the implanted dopant atoms and the gate can be precisely controlled according to the electrical requirements.

ion implantation

15. Oxidation

An oxide (the interlayer oxide, ILD for short, e.g. 700 nm) is deposited to insulate against the metallization layers above. This is done in an LPCVD process using TEOS, which provides good step coverage.

interlayer oxide

16. Photolithography and Etching

A further resist layer is patterned, and the edges of the contact holes are rounded off in an isotropic etch process.

rounding of contact holes

17. Etching

The contact holes are then opened down to the n-doped regions and to the gate in an anisotropic etch process.

contact hole etching

18. Metallization

The contact holes are filled with aluminium in a sputtering process.

metallization (sputtering)

19. Photolithography

In a final lithography step, another resist layer is patterned.

photolithography for vias

20. Etching

The resist pattern is transferred into the underlying metallization layer in an anisotropic dry etch step.

etching of vias

21. Resist Removal

Finally, the resist is removed, leaving behind aluminium interconnects that drive the transistor.

resist removal for vias

The actual structure of a transistor is considerably more complex. Additional planarization layers may be used to support the lithographic processes, and several drain/source implantations may be carried out to precisely set the threshold voltage. Additional spacers at the gate are likewise possible, in order to fine-tune the channel length or influence the doping profile.

3. Mode of Operation

Enhancement-mode FET: Without a positive voltage applied to the gate, no free charge carriers in the form of electrons are available between source and drain, since the substrate is p-doped. In the steady state, holes are the majority charge carriers here, while electrons are the minority charge carriers.

FET off

A positive voltage applied to the gate attracts electrons from the substrate through the electric field (thereby pushing holes away), thus forming a conductive n-channel between source and drain. The insulating silicon dioxide layer prevents any current flow between the substrate and the gate.

FET on

Because the transistor blocks current flow without an applied voltage, it is also referred to as normally-off. The channel does not form gradually but only once a certain gate voltage, the threshold voltage, is exceeded. This is the most important characteristic parameter of the transistor: below it, the transistor is off; above it, the transistor conducts. It can be specifically adjusted through the doping of the substrate and the choice of gate material.

Depletion-mode FET: By lightly n-doping the region between source and gate, a transistor can be made conductive even without a gate voltage (a voltage between source and drain alone is sufficient). So-called depletion FETs, also known as normally-on transistors, only switch off when a voltage more negative than that at the source terminal is applied to the gate. This pushes away the electrons located beneath the gate — the conductive electron bridge is lost.