Crystal Growth & Substrates

Unlike silicon, SiC cannot be pulled from a melt – at the temperatures required, SiC sublimes rather than melting, since no liquid phase exists at normal pressure (SiC decomposes directly into the vapor phase above about 2830 °C). A Czochralski or Bridgman process, as used for silicon, is therefore ruled out from the start. Instead, the PVT process (Physical Vapor Transport, also known as the modified Lely method) is used: a supply of SiC powder is heated above 2000 °C and sublimes, the vapor phase – consisting mainly of Si, Si2C and SiC2 – travels along a temperature gradient to a cooler SiC seed crystal and crystallizes there epitaxially.

The process runs for days to weeks and grows a cylindrical boule, from which wafers are subsequently sawn. Growth rates are typically only a few hundred micrometers per hour, which makes the process comparatively slow and cost-intensive – a key reason why SiC substrates remain more expensive than silicon substrates to this day. Precise control of the temperature gradient inside the closed graphite crucible is critical for ensuring uniform, low-defect crystallization across the entire boule diameter; deviations quickly lead to micropipes, dislocations, or parasitic polytype inclusions. Sawing is followed by extensive lapping, polishing and CMP steps until an epitaxy-ready wafer surface with an atomically smooth terrace structure is achieved.

SiC occurs in more than 200 crystal structures (polytypes), which differ only in the stacking sequence of the Si-C double layers along the c-axis – this is known as polytypism, since materials with identical chemical composition end up with different electronic properties. The most common polytypes are 3C (cubic), 4H and 6H (both hexagonal), named after the number of Si-C double layers in the repeating stacking sequence.

4H-SiC has become the standard for power electronics because it offers higher and more isotropic electron mobility than, for example, 6H-SiC, whose mobility can vary by up to a factor of three depending on crystal direction. 4H-SiC also has a larger bandgap than 6H-SiC (3.26 eV versus 3.0 eV) and therefore a higher breakdown field strength, making it additionally attractive for high-voltage applications. Growth is usually performed off-axis (typically a 4° miscut from the c-axis, 8° in earlier processes) to force step-flow growth during homoepitaxy, in which atoms preferentially attach at existing step edges rather than nucleating new islands. Without this deliberate miscut, the thermodynamically more favorable 3C polytype would tend to form, leading to disruptive polytype inclusions and local crystal defects within the 4H lattice.