Semiconductor Technology from A to Z

Everything about semiconductors and wafer fabrication

1. The 2DEG: Foundation of the HEMT

When a thin AlGaN layer is grown on GaN, spontaneous and piezoelectric polarization at the interface creates an extremely thin, highly mobile electron gas – the two-dimensional electron gas (2DEG). Both polarization contributions add up for the usual Ga-polar growth direction: spontaneous polarization arises from the lack of inversion symmetry in the wurtzite crystal structure, while piezoelectric polarization additionally arises from the mechanical strain of the thin AlGaN layer on the underlying GaN. The resulting polarization charge at the interface attracts free electrons, which accumulate in a channel only a few nanometers thick directly below the interface.

Unlike in a Si MOSFET, this conductive channel needs no doping at all: it arises purely from the polarization charge at the AlGaN/GaN heterointerface and reaches electron mobilities well above those of doped bulk material, because the electrons in the 2DEG are spatially separated from the ionized impurities that would otherwise scatter them (an effect known as modulation doping, also used in III-V HEMTs for RF technology). Typical sheet carrier densities are on the order of 1×10¹³ cm⁻², with mobilities of several thousand cm²/Vs. This structure forms the basis of the HEMT (High Electron Mobility Transistor) and enables the extremely fast switching capability of GaN power transistors described in the next paragraph.

2. The GaN HEMT as a Power Switch

A gate electrode on the AlGaN barrier controls the 2DEG beneath it: applying a sufficiently negative gate voltage locally depletes the channel under the gate and the transistor turns off. This purely electrostatic control of the channel via the gate field differs fundamentally from the switching mechanism of a bipolar device: no carriers need to be injected or swept out, only the existing 2DEG charge needs to be locally displaced or restored, which happens on a timescale of a few nanoseconds.

Because no pn junction and no stored minority carriers are involved, the GaN HEMT switches extremely fast and with very low losses – ideal for high-frequency switch-mode power supplies and fast chargers, where switching losses increasingly limit Si and even SiC devices. In practice, commercial GaN HEMTs achieve switching edges on the order of a few nanoseconds, enabling switching frequencies in the high kHz to MHz range where Si and SiC devices can no longer be operated economically, due to their higher switching losses and – in the case of SiC MOSFETs – additional gate charge. This high switching frequency in turn allows passive components such as storage inductors and filter capacitors to be shrunk dramatically, which is the decisive system advantage of GaN in compact applications such as chargers (see the applications chapter).

3. E-Mode vs. D-Mode and the Cascode Configuration

An untreated AlGaN/GaN HEMT is normally-on (D-mode): the 2DEG already conducts with no gate voltage applied, which is undesirable in power electronics for safety reasons (fail-safe behavior if gate drive is lost) – a failure of the gate driver circuit would otherwise leave the transistor conducting uncontrollably instead of switching off safely. For practically all power applications, normally-off behavior (E-mode) is therefore required, analogous to the behavior of a Si power MOSFET.

True E-mode devices (normally-off) are achieved, for example, with a p-GaN gate layer that locally depletes the 2DEG under the gate at rest. Physically, this relies on a shift of the band edge: the ionized acceptors (usually magnesium) in the p-GaN layer create a built-in electric field that pushes the conduction band edge at the AlGaN/GaN interface directly beneath the gate above the Fermi level – at rest, no free electrons accumulate there, so the 2DEG is locally interrupted. Outside the gate, where there is no p-GaN layer, the band edge stays below the Fermi level and the channel continues to exist unimpeded. Only a positive gate voltage above the threshold voltage pushes the band edge locally back below the Fermi level and restores the channel. The threshold voltage of p-GaN gate HEMTs is typically only 1 to 2 V, which, compared to Si MOSFETs (usually 2 to 4 V), requires a more careful gate driver design to avoid false triggering from noise.

A common alternative is the cascode configuration: a normally-on GaN HEMT in series with a low-voltage Si MOSFET, which imposes normally-off behavior on the combined device from the outside. Here the Si MOSFET provides the control: as long as it blocks, its blocking voltage appears as a negative gate-source voltage across the GaN HEMT and keeps it in the off state; when the Si MOSFET turns on, this voltage disappears and the GaN HEMT conducts. This approach allows the use of well-proven, uncritical Si gate drivers, but introduces additional losses and parasitic capacitances through the series-connected Si MOSFET – a trade-off between simpler drive requirements and maximum performance.

Cross-section comparison of D-mode and E-mode GaN HEMT

4. Lateral vs. Vertical: Why GaN Mostly Stays Lateral

Unlike SiC MOSFETs, commercial GaN power devices today are almost exclusively lateral – source, gate and drain all sit on the same wafer surface, and current flows horizontally rather than vertically through the chip. This design contrasts with practically all Si and SiC power transistors, where source sits on the front side and drain on the wafer backside, with current flowing vertically through the substrate.

The reason is heteroepitaxy on foreign substrates (see Chapter 2): vertical GaN devices would need a thick, low-resistance bulk GaN layer for the return current path, which is practically not economical to produce with heteroepitaxial GaN-on-Si, since the silicon substrate must remain electrically insulating or high-resistance and is itself unsuited as a vertical current path. A purely vertical GaN device would therefore require a native, low-resistance doped GaN substrate – exactly the expensive substrate class, barely available in large diameters, whose avoidance was the very reason for heteroepitaxy in the first place. The lateral design elegantly sidesteps this problem, since the entire current flow takes place within the thin, high-quality epitaxial GaN/AlGaN layer at the wafer surface, with the substrate serving merely as a mechanical carrier. Vertical GaN structures – among other approaches, using locally patterned, low-resistance vias through the substrate – are the subject of active research but are not yet in volume production.