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Overlay refers to the registration accuracy between a newly exposed lithography layer and the previously patterned layer beneath it. If a contact-hole layer fails to land precisely on the underlying metallization, the result is a high-resistance or entirely missing contact – at advanced nodes, with overlay tolerances in the single-digit nanometer range, even a slight shift is enough to cause this.

Unlike feature size itself, overlay does not concern a single layer but every pair of layers that must be aligned to one another – in a modern logic process with several dozen lithography steps, that means just as many individual overlay budgets that all have to be met at the same time. An error on just one of these layer pairings can already render an entire die unusable, which is why overlay ranks alongside feature size itself as one of the most yield-critical measurements in the whole fabrication flow.

Measurement takes place on dedicated target structures, usually exposed along the edge of the scribe line outside the actual die. Classic targets use a box-in-box design: a square on the lower layer, a smaller one on the upper layer, with the offset between them measured directly. More modern AIM targets (Advanced Imaging Metrology) replace the simple boxes with segmented structures that are considerably less sensitive to process variations such as uneven CMP polishing.

How many targets are exposed per wafer is a trade-off between measurement effort and spatial resolution: a few, widely spaced targets give a quick, coarse picture but miss local deviations within a single exposure field. This is why the trend increasingly favors in-die targets placed directly among the circuit structures rather than only along the scribe line edge – they capture a finer-grained picture of the actual distortion, but cost valuable chip area and must therefore be kept small and unobtrusive.

Image-based measurement captures the target structure directly through optics, calculating the offset from the camera image. For very small structures, DBO (Diffraction Based Overlay) is increasingly used instead: rather than an image, the diffraction signature of a grating-in-grating target is analyzed, which is more sensitive and less limited by optical resolution.

The reason lies in the measurement principle itself: image-based measurement ultimately determines the offset from the position of individual edges, whose detection becomes increasingly noisy as feature sizes shrink. DBO instead averages the scattered light from many grating lines at once, which cancels out random noise and reliably captures shifts down to the sub-nanometer range – though at the cost of measurement speed, since a separate grating pair is needed for each measurement direction.

The allowable total error – the overlay budget – is made up of several sources: the scanner's own inherent distortion, wafer-internal distortion from thermal stress accumulated in prior process steps, and systematic offset between different exposure tools. Overlay is usually tracked alongside CD (Critical Dimension) as the second key litho-control metric – while CD checks the size of a structure, overlay checks its position relative to other layers.

For analysis, the measured offset is typically decomposed into individual error components: a uniform shift of the entire wafer, a rotation about its center, and a scaling distortion. This decomposition – known as the overlay fingerprint – shows which portion is attributable to the tool and which to the wafer itself, and feeds directly into automated control loops (Advanced Process Control) that correct the exposure parameters of subsequent wafers accordingly, well before anyone even checks whether yield has suffered.