A gate electrode uses an electric field to control the conductivity of a channel between source and drain. Once the gate voltage is high enough, a conductive channel forms and current can flow; below that threshold, the transistor stays off. The gate is isolated from the channel by a thin oxide layer, so essentially no control current flows.
How does a FinFET work?
In a FinFET, the conducting channel stands as a thin, vertical "fin" on the substrate, wrapped by the gate on three sides. This multi-sided wrap gives the gate much better control over the channel than in planar transistors. That reduces leakage currents and allows further shrinking of feature sizes.
How does a transistor work in general?
At its core, a transistor is an electronically controllable switch: a small control signal (voltage or current) turns a larger current path on or off, or amplifies it. The two main families are bipolar transistors (current-controlled) and field-effect transistors (voltage-controlled). Modern chips consist of billions of such switches.
How does flash memory work?
Inside a flash cell transistor, an additional, electrically isolated floating gate sits between the control gate and the channel. Electrons are moved onto or off this floating gate by quantum tunneling and stay trapped there even without power. Their presence measurably shifts the transistor's switching threshold — that's the stored "0" or "1".
How does MRAM work?
MRAM stores data through magnetization direction in a magnetic tunnel junction, not through electric charge. A reference layer has fixed magnetization, a free layer has switchable magnetization; whether the two are parallel or antiparallel changes the tunnel resistance measurably. In STT-MRAM, the free layer is switched directly by a spin-polarized write current.
How does a microprocessor work at the chip level?
A microprocessor combines a control unit, arithmetic logic unit (ALU), registers, and cache memory on a single die, connected via internal buses. The control unit fetches instructions from memory, decodes them, and directs the ALU to execute them — typically using pipelining to process multiple instructions simultaneously. Physically, this is billions of transistors wired together across multiple metal layers.
How does an SRAM cell (6T) work?
A 6T SRAM cell stores a bit in two cross-coupled inverters that hold each other stable as long as supply voltage is present. Two additional access transistors connect the cell to the two bit lines for reading and writing whenever the word line is activated. Because, unlike DRAM, no periodic refresh is needed, SRAM operates significantly faster, though it requires more area per stored bit.
How does a DRAM cell (1T1C) work?
A DRAM cell stores a bit as electric charge on a tiny capacitor, connected or disconnected through a single access transistor. Because leakage currents drain the charge over time, each cell typically must be read and rewritten roughly every 64 milliseconds (refresh). The small footprint of just one transistor and one capacitor per bit makes DRAM much denser than SRAM, though also slower.
How does a GAAFET work?
In a gate-all-around FET, the gate completely wraps the conducting channel instead of covering it from only three sides as in a FinFET. The channel consists of several stacked silicon nanosheets, each fully surrounded by the same gate material. This complete wrap gives the gate maximum electrostatic control and allows further scaling where FinFETs reach their limits.
How does an IGBT work?
An IGBT (Insulated-Gate Bipolar Transistor) combines the voltage-controlled, easily driven gate structure of a MOSFET with the low on-resistance of a bipolar transistor. An additional p-doped collector layer injects charge carriers into the drift region, significantly lowering resistance at high voltages and currents. This makes the IGBT especially well suited for power electronics such as frequency converters and inverters.
What do NMOS, PMOS, CMOS, and DMOS mean?
NMOS and PMOS describe MOSFETs that conduct via electrons (n-channel) or holes (p-channel) respectively, differing in doping type and threshold voltage polarity. CMOS combines both transistor types on a single chip so that in every logic state only one of the two conducts, resulting in very low static power consumption. DMOS (double-diffused MOS) uses two successive diffusion steps to form a short, precisely controlled channel next to a lightly doped drift region, allowing higher voltages and currents — which is why it is common in power electronics.