The Junction FET (JFET)

An n-channel JFET consists of a continuous channel of n-doped semiconductor material, usually silicon. On opposite sides of the channel (in a planar layout) or surrounding it (in a symmetric layout), heavily p⁺-doped regions are introduced, which together form the gate terminal. Ohmic source and drain contacts are located at the two ends of the channel. Because the channel is physically symmetric between source and drain, the two terminals are in principle interchangeable for most JFETs – it is the external circuit that determines which terminal serves as the source (reference potential). In p-channel JFETs, the doping types and polarities are reversed accordingly.

The pn junction between gate and channel is always reverse-biased during operation (for an n-channel JFET, V_GS ≤ 0 V). This creates a depletion region that is essentially free of mobile charge carriers and therefore does not contribute to current flow. As the reverse bias increases, this region grows into the channel and narrows its conductive cross-section. Because the drain-source voltage V_DS itself produces a voltage drop along the channel, the depletion region is more pronounced at the drain end than at the source end – the channel therefore narrows in a wedge shape. Once the depletion region reaches the opposite edge at a sufficiently high voltage, the channel is completely pinched off.