Operational Amplifiers

The operational amplifier (op-amp) is the central building block of analog circuit design. It amplifies the voltage difference between its two inputs – the inverting (–) and the non-inverting (+) input – by a very large factor, the open-loop gain A₀.

The ideal op-amp has four properties that serve as a simplification for hand analysis of circuits:

• infinite open-loop gain (A₀ → ∞)
• infinite input resistance (no input current)
• zero output resistance (ideal voltage source at the output)
• infinite bandwidth

In a negative-feedback circuit (e.g. an amplifier with a resistor network), the high open-loop gain gives rise to the virtual ground: feedback drives the voltage difference between the two inputs to nearly zero, even though there is no direct conductive path between them. This principle underlies the analysis of nearly all basic op-amp circuits (inverting amplifier, non-inverting amplifier, integrator, difference amplifier).

Real op-amps deviate from this ideal: finite gain, finite bandwidth, input currents (bias currents drawn by the transistor input stage), and a non-zero output resistance. These non-ideal effects are quantified in the following sections.

The input stage of an op-amp is almost always a differential pair: two transistors whose sources (MOS) or emitters (bipolar) connect to a shared current source. The difference between the two input voltages steers how the shared bias current splits between the two branches.

In modern CMOS designs, the active load is typically a current mirror: a reference transistor sets a current that is mirrored to one or more further branches through the ratio of transistor widths (W/L). In the op-amp input stage, the current mirror converts the differential current signal into a single-ended voltage signal – this step largely sets the gain of the first stage.

Key parameters of this stage are the transconductance g_m of the input transistors (determining gain and noise performance) and the common-mode input range – the range within which both input voltages may lie without pushing a tail-current or differential-pair transistor out of saturation.