Semiconductor Technology from A to Z

A comparator compares two input voltages and produces one of two logic levels at its output, depending on which input is higher. Unlike an operational amplifier, a comparator is fundamentally operated without feedback and is therefore deliberately not designed for stability at a linear operating point; its gain may be arbitrarily high – typical open-loop gains are 60 to 100 dB – without requiring frequency compensation, since the output is always meant to be driven into saturation at one of the two logic levels.

Important comparator parameters include propagation delay, which ranges from a few nanoseconds for simple comparators down to a few tens of picoseconds for regenerative high-speed latches, and resolution, the smallest voltage difference the comparator can still reliably distinguish, which for precision comparators is on the order of a few millivolts down to below 1 mV.

For high speed at low power consumption, modern ADCs mostly use regenerative comparators, the best-known example being the StrongARM latch. It uses two cross-coupled inverters that positively feed back on each other once the clock is applied, amplifying an initially tiny input voltage difference on the order of a few millivolts exponentially fast – typically within a few hundred picoseconds – to a full logic level.

Because the StrongARM latch draws current only during the active clock edge and is idle otherwise, it is particularly well suited to clocked systems such as SAR ADCs, which operate at clock rates from several hundred megahertz up to the gigahertz range and where the comparator must be evaluated many times per conversion without contributing significant static power dissipation; the energy per comparison in modern implementations is often only a few femtojoules.

Manufacturing mismatch between the nominally identical transistor pairs of a comparator produces an offset voltage, typically a few millivolts to a few tens of millivolts in uncalibrated circuits, that shifts the actual switching threshold away from the ideal zero crossing, ultimately limiting the achievable resolution of the comparator unless reduced below 1 mV through calibration techniques such as offset trimming. If the input signal lies close to the switching threshold and is also noisy, the output can repeatedly toggle back and forth between the two levels.

A Schmitt trigger addresses this problem with deliberately built-in hysteresis, often a few tens to a few hundred millivolts wide, where the switching threshold differs for rising and falling signals so that a transition, once made, is only reversed after a larger signal change. Regenerative latch comparators also exhibit the so-called kickback effect: the rapid charging and discharging of internal nodes during regeneration briefly couples back to the inputs and can disturb preceding, high-impedance signal sources by a few millivolts.