Semiconductor Technology from A to Z

Everything about semiconductors and wafer fabrication

1. Overview

CMOS technology and the bipolar transistor represent two fundamentally different ways of controlling and amplifying electrical signals. While the bipolar transistor dominated digital electronics for decades (TTL logic), the field-effect transistor in the form of CMOS technology has almost completely displaced it since the 1980s – not because it is inherently "better", but because its properties suit mass integration far more effectively. In analogue, radio-frequency, and power applications, however, the bipolar transistor remains relevant to this day.

The real reason for this technology shift lies less in individual device properties than at the system level: digital circuits consist of millions to billions of individual transistors, and there it is mainly the power dissipation per switching event, together with the achievable packing density, that decides whether a technology is practical. As the following paragraphs show, CMOS offers decisive advantages here through its near-lossless standby state and easier scalability. Bipolar transistors, in turn, play to their strengths wherever high current drive capability, low noise, or high cutoff frequencies matter – properties that are secondary in digital electronics but continue to be decisive in analogue and RF circuits. The following paragraphs compare both device families in detail: first the basic operating principle, then power dissipation and switching behaviour, and finally integration density and scalability.

2. Operating Principle Compared

The MOSFET is a unipolar device: a voltage at the gate generates a conductive channel between source and drain via an electric field. Because the gate is insulated from the channel by an oxide layer, practically no control current flows in steady state – the MOSFET is voltage-controlled.

The bipolar transistor, by contrast, works with two types of charge carriers simultaneously (hence "bipolar"). A base current controls a much larger collector current through carrier injection and diffusion. It is therefore current-controlled and requires a continuous control current during operation.

This distinction between field control and charge-carrier control runs through practically all further electrical properties of both device families. In a MOSFET, it is essentially the gate capacitance that determines how quickly the channel can be built up and removed – a purely electrostatic process that requires no minority-carrier injection. In a bipolar transistor, by contrast, charge carriers must actually be injected into the base region for every switching event and then swept out again on turn-off, which costs additional time and is known as the storage-time effect. This differing physical basis is also what directly gives rise to the differences in power dissipation and switching behaviour covered in the next paragraph.

Circuit symbols of an NMOS and an NPN transistor with their respective control quantity

3. Power Dissipation and Switching Behaviour

This difference has direct consequences for power dissipation: in CMOS circuits, an n-channel and a p-channel transistor are always switched complementarily for each logic level, so that no path conducts between supply and ground in the static state – static power dissipation is close to zero. Power dissipation here arises mainly dynamically, from charging and discharging the gate and line capacitances during switching.

Bipolar transistors, on the other hand, require a continuous base current to stay conducting, resulting in permanent static power dissipation. In return, their high transconductance (a large collector current per change in control current) often gives them higher switching speeds and better drive capability into low load impedances.

The dynamic power dissipation of a CMOS circuit grows approximately linearly with switching frequency and the sum of all capacitances being charged and discharged (P ≈ C · V² · f), which is why voltage scaling and capacitance reduction are among the most important levers in process optimization. In bipolar circuits, by contrast, the static component usually dominates, so total power dissipation grows almost linearly with the number of transistors, regardless of how often switching actually occurs – a behaviour that demands considerably more cooling effort from highly integrated bipolar logic than from an equivalent CMOS circuit at a comparable transistor count. This relationship is precisely the core of the integration-density advantage of CMOS discussed in the next paragraph.

4. Integration Density and Scaling

The near-lossless standby behaviour of CMOS allows billions of transistors to be integrated on a single chip without total power dissipation becoming unmanageable – an advantage bipolar logic could never match at this density. A MOSFET also requires no elaborate base doping structure, making it more area-efficient and easier to scale.

Bipolar transistors continue to hold their ground wherever high current drive capability, low noise, or high cutoff frequencies are required: in RF amplifiers, power stages, and precision analogue circuits (e.g. operational amplifiers). BiCMOS processes also combine both worlds deliberately.

A further scaling advantage of CMOS is that a MOSFET's characteristic parameters – channel length, oxide thickness, threshold voltage – can be shrunk together across many technology generations according to clear scaling rules, without changing the underlying operating principle. A bipolar transistor, by contrast, can only be scaled down to a limited extent, since the base width directly affects cutoff frequency and breakdown voltage – a base region that is too thinly doped or too narrow quickly leads to punch-through. BiCMOS processes address this dilemma by combining CMOS logic for digital portions with bipolar transistors for critical analogue or RF sub-circuits on the same chip – at the cost of considerably more complex and expensive process integration compared to pure CMOS manufacturing.