Field-Effect Transistor Families: An Overview

All field-effect transistors (FETs) control a conductive channel between two terminals (source and drain) via an electric field generated by a third electrode (gate). Unlike the bipolar transistor, where a base current controls the collector current, a FET draws practically no steady-state gate current – control is purely voltage-driven, through the gate-source voltage V_GS. The three main FET families differ mainly in how the gate is electrically isolated from the channel:

• MOSFET (Metal-Oxide-Semiconductor FET): gate separated from the channel by a thin oxide layer (insulator, e.g. SiO₂ or a high-k dielectric)
• JFET (Junction FET): gate separated from the channel by a reverse-biased pn junction
• MESFET (Metal-Semiconductor FET): gate separated from the channel by a Schottky contact (a direct metal-semiconductor junction with no intermediate layer)

The classic MOSFET structure is described in detail in Construction of a Field-Effect Transistor; the other two families are covered in the following chapters.

A second important distinction is the operating mode. Depletion-mode FETs (“normally-on”) already have a conductive channel at V_GS = 0 V; an applied gate voltage progressively pinches this channel off. Enhancement-mode FETs (“normally-off”) have no channel at V_GS = 0 V – one must first be induced by a gate voltage. While MOSFETs can be built in either mode (enhancement-mode dominates in digital logic), JFETs operate exclusively in depletion mode by design. MESFETs are predominantly fabricated as depletion-mode devices (D-MESFETs), though enhancement-mode variants (E-MESFETs) also exist for digital GaAs logic.