Semiconductor Technology
from A to Z
Everything about semiconductors and wafer fabrication
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Fundamentals & Materials
Fundamentals
The atomic structure
The elements, the periodic table
Chemical bonds
Noble gases
Conductors – Insulators – Semiconductors
Doping: n- and p-semiconductors
The p-n junction
Transistors and Memory
CMOS vs. Bipolar
Bulk vs. SOI
Wafer Fabrication
Silicon
Production of raw silicon
Fabrication of the single crystal
The wafer
Compound Semiconductors
Fundamentals & Material System
Crystal Growth & Substrates
SiC Power Devices
GaN Power Devices
Applications & System Comparison
HEMT and HBT for RF Applications
InP-Based Photonic Devices
Front-End Processes
Doping Techniques
Diffusion
Ion Implantation
Oxidation
Overview
Fabrication of oxide layers
LOCOS technology
Deposition
Plasma, the fourth aggregation state of a material
Chemical vapor deposition
Physical deposition methods
Metallization
Requirements on metallization
Aluminum technology
Copper technology
Metal semiconductor junction
Chemical Mechanical Polishing (CMP)
Wiring
Photolithography
Exposure and resist coating
Exposition methods
Photoresist
Development and inspection
Photomasks
Optical Proximity Correction (OPC)
DUV vs. EUV
EUV Tool Technology
Wet Chemistry
Etch processes
Wet etching
Wafer cleaning
Dry Etching
Overview
Dry etch processes
Reactor Types
Compound Semiconductors and High-k Materials
Back-End & Test
Metrology
Film thickness measurement
Particle inspection
Overlay Measurement
Wafer Test
Wafer Test
Final Test and Binning
Assembly
Dicing
Die Attach
Bonding
Encapsulation
Advanced Packaging / 3D Integration
Limits of Classical Integration
Through-Silicon Via (TSV)
2.5D Integration: The Interposer
3D Stacking
Chiplets & Heterogeneous Integration
Applications & Outlook
Reliability
ESD Protection Structures
Electromigration, TDDB and NBTI/PBTI
Burn-in and HTOL Testing
Devices & Applications
Devices
Field-Effect Transistor Families: An Overview
Field-effect transistors
The Junction FET (JFET)
The Metal-Semiconductor FET (MESFET)
Characteristic Curves and Transistor Equations
Construction of a FinFET
Bipolar transistors
Si Power Devices (Power MOSFET, IGBT)
DRAM Fabrication: The Trench Capacitor Process
Digital technology
Digital Logic Fundamentals
From transistor to logic gate
The CMOS Fabrication Flow
Sequential Logic: Flip-Flops, Latches, and Clock Trees
Static Timing Analysis: Setup and Hold Time
Static and Dynamic Power Dissipation, Leakage Currents
Classic Memory Cells
The SRAM Cell
The DRAM Cell
The Flash Memory Cell
EDA & Layout
Design Rules
Layout versus Schematic (LVS)
Circuit Layouts
Processor Architecture
Processor Architecture
CPU vs. GPU
Next-Gen Memory Technologies
Why New Memory Technologies?
MRAM – Magnetoresistive RAM
ReRAM – Resistive RAM
PCM – Phase-Change Memory
Comparison & Context
Analog & Mixed-Signal Design
Operational Amplifiers
ADC Architectures
DAC Architectures
Bandgap References
Comparators
PLL – Phase-Locked Loop
Voltage Regulators: LDOs and Switching Regulators
Noise in Semiconductor Devices
Micromechanics
Introduction to MEMS
Anisotropic Etching of Silicon
Sacrificial Layer Technique
Bulk vs. Surface Micromachining
The MEMS Accelerometer
The Microphone and Pressure Sensor
DRIE: Deep Reactive Ion Etching
Optoelectronics & Photonics
Fundamentals of Optoelectronics
Light-Emitting Diodes (LED)
Laser Diodes
Photodiodes & Photodetectors
Integration & Applications
Fabrication of Optoelectronic Devices
Solar Cells
How does it work?
Fabrication Processes
Devices & Digital Technology
Optoelectronics
Packaging & Other Topics
Process Flow
Supply Chain
PDF
Lexicon
Technology
10000 nm
3000 nm
1500 nm
1000 nm
800 nm
600 nm
350 nm
250 nm
180 nm
130 nm
90 nm
65 nm
45 nm
32 nm
22 nm
16 nm
11 nm
7 nm
5 nm
3 nm
2 nm
Akronyms
Statistics
Bit per euro (DRAM)
Evolution of the gate length of MOSFETs
Exposure wavelength vs. critical dimensions
FLOPS: floating point operations
Intel:AMD - CPU clock
Intel:AMD - Number of transistors
Intel:AMD - Process development
Manufacturing costs for different technology nodes
Manufacturing costs per transistor
Millions of instructions per second
Number of calculations per second per 1000 euro
Number of manufactured bits
Reliability
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ESD Protection Structures
ESD Models and Damage Mechanisms
Protection Diodes and Snapback Behavior
Grounded-Gate NMOS and Power Clamps
Electromigration, TDDB and NBTI/PBTI
Electromigration
Time-Dependent Dielectric Breakdown (TDDB)
Bias Temperature Instability (NBTI/PBTI)
Burn-in and HTOL Testing
The Bathtub Curve and the Purpose of Burn-in
HTOL Test Conditions
The Arrhenius Model for Lifetime Prediction
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Content
Fundamentals
Wafer Fabrication
Doping Techniques
Oxidation
Deposition
Metallization
Photolithography
Wet Chemistry
Dry Etching
Compound Semiconductors
Metrology
Wafer Test
Assembly
Advanced Packaging / 3D Integration
Devices
Digital technology
Analog & Mixed-Signal Design
Micromechanics
Optoelectronics & Photonics
How does it work?
Reliability
ESD Protection Structures
Electromigration, TDDB and NBTI/PBTI
Burn-in and HTOL Testing