Research Notes: Ultra-thin chip stacks, MoS2 analog memory, and sensor-side processing

August 10, 2026

Research Notes: Ultra-thin chip stacks, MoS2 analog memory, and sensor-side processing

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Three separate research groups have reported hardware approaches that push computation closer to data and sensors. One result targets ultra-high-density chip stacking, another implements analog search operations in a MoS2-based content-addressable memory, and a third folds sensing, memory, and signal processing into a single optoelectronic device.

At POSTECH, KITECH, and Texas A&M University, researchers developed a process that transfers chips and forms interconnects in the same step. The method combines transfer printing with in-situ bonding, creating metallic connections during chip transfer under low-temperature, low-pressure conditions. Using this approach, the team stacked ten chips, each about 14 μm thick, while keeping alignment errors extremely small and suppressing warpage.

The same work reported integration density about four times higher than existing HBM1. human body modelESD test model that simulates a person discharging static electricity into a component.2. High Bandwidth MemoryHBM is a stacked DRAM architecture designed to provide very high memory bandwidth. technologies. According to the researchers, the result points to a path toward future high-performance AIartificial intelligence semiconductors and next-generation memory systems, though the key technical message is the combination of precision placement and reliable bonding in a repeated stacking flow.

A second study from the University of Hong Kong, Fudan University, and the National University of Singapore introduced an analog CAMcomputer-aided manufacturingComputer-assisted planning and control of manufacturing processes. built from 2D molybdenum disulfide flash memories with antimony contacts. The cell design uses only two transistors per cell and can handle continuous analog signals directly. In a fabricated 8 × 16 array, the device showed a read-out current above 60 μA μm−1, an ON/OFF ratio greater than 109, energy below 0.1 femtojoule per search per cell, and 36 picoseconds latency.

The same CAMcomputer-aided manufacturingComputer-assisted planning and control of manufacturing processes. calculated analog Hamming distance for machine-learning classification about 108 times faster than a standard CPUcentral processing unitMain processor that executes program instructions and performs data operations.. The authors frame the result as a hardware basis for search-heavy AIartificial intelligence workloads, including attention-style operations, but the reported contribution is the combination of MoS2 flash memory, analog search, and extremely low-latency operation.

Oregon State University reported a phototransistor that integrates light sensing, memory, and processing in one structure. An oxide semiconductor forms the transistor channel, while an organic photosensitive layer on top absorbs light and traps charge. Those trapped charges continue to influence channel current after illumination ends, so the device retains a memory of previous optical input.

A gate voltage can move the trapped charges closer to or farther from the channel, strengthening or weakening the memory effect and changing how quickly it fades. The device therefore creates a programmable time window for processing sensor signals directly at the point of detection.

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Source: Semiconductor Engineering

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