Cadence has added an RTL1. resistor-transistor logicSemiconductor device or transistor technology used to control electrical currents and signals.2. register transfer levelRTL is the hardware description layer where design assumptions are often captured.3. Register-Transfer LevelRTL describes the hardware implementation stage targeted by the benchmark. generation agent to its ChipStack AIartificial intelligence Super Agent platform, extending the system from autonomous verification and debugging into spec-to-RTL1. resistor-transistor logicSemiconductor device or transistor technology used to control electrical currents and signals.2. register transfer levelRTL is the hardware description layer where design assumptions are often captured.3. Register-Transfer LevelRTL describes the hardware implementation stage targeted by the benchmark. generation. The new capability takes natural-language prompts and uses them to generate RTL1. resistor-transistor logicSemiconductor device or transistor technology used to control electrical currents and signals.2. register transfer levelRTL is the hardware description layer where design assumptions are often captured.3. Register-Transfer LevelRTL describes the hardware implementation stage targeted by the benchmark., analyze the result, and refine it toward power, performance, and area targets.
According to early evaluations, the RTL1. resistor-transistor logicSemiconductor device or transistor technology used to control electrical currents and signals.2. register transfer levelRTL is the hardware description layer where design assumptions are often captured.3. Register-Transfer LevelRTL describes the hardware implementation stage targeted by the benchmark. Generation Agent achieved an average 24% reduction in area and an 18% reduction in power compared with pure foundation-model code generation. Cadence also reports 100% functional accuracy for the generated RTL1. resistor-transistor logicSemiconductor device or transistor technology used to control electrical currents and signals.2. register transfer levelRTL is the hardware description layer where design assumptions are often captured.3. Register-Transfer LevelRTL describes the hardware implementation stage targeted by the benchmark. in those tests. Beyond first-time creation, the platform can update existing RTL1. resistor-transistor logicSemiconductor device or transistor technology used to control electrical currents and signals.2. register transfer levelRTL is the hardware description layer where design assumptions are often captured.3. Register-Transfer LevelRTL describes the hardware implementation stage targeted by the benchmark. when requirements change.
The upgrade flow is meant to automate RTL1. resistor-transistor logicSemiconductor device or transistor technology used to control electrical currents and signals.2. register transfer levelRTL is the hardware description layer where design assumptions are often captured.3. Register-Transfer LevelRTL describes the hardware implementation stage targeted by the benchmark. revision so that legacy code can be adapted to new architecture requirements, PPA1. power, performance, and areaPPA is the main optimization target for advanced-node designs.2. power, performance, area targets, and functional constraints. That makes the agent relevant not only for fresh block creation but also for iterative front-end work where design intent and implementation need to be brought back into alignment.
Cadence says Honda R&D is already evaluating the technology on advanced automotive SoCs, where safety-critical requirements and tight power and cost limits make RTL1. resistor-transistor logicSemiconductor device or transistor technology used to control electrical currents and signals.2. register transfer levelRTL is the hardware description layer where design assumptions are often captured.3. Register-Transfer LevelRTL describes the hardware implementation stage targeted by the benchmark. efficiency especially important. The expanded ChipStack AIartificial intelligence Super Agent is planned for select early-access customers in the fourth quarter of 2026.