Semiconductor companies should not start from the question of how many junior engineers can be replaced by AIartificial intelligence. The more important issue is how to train new engineers so they can grow into the roles that future design teams will need. The article argues that short-term AIartificial intelligence substitution risks weakening the pipeline of engineers who are supposed to become the next generation of senior staff.
The text points to verification as an area where agentic AIartificial intelligence is already being used with some success. At the same time, verification remains an expanding and increasingly complex discipline, and the need for careful work has not disappeared. That leaves open a practical question: if junior verification engineers are removed from the workflow, where do the future senior engineers come from?
According to the piece, early AIartificial intelligence tools were often presented as a way to spare junior engineers from learning EDA1. electronic design automationSoftware tools for designing, simulating, verifying and laying out electronic circuits.2. equipment data acquisitionSystem or method for collecting, storing, exchanging or analyzing data. tools, languages or syntax. The author argues that these skills can be learned quickly and are not what separates a junior engineer from a senior one. Experience, judgment and the ability to handle tasks that AIartificial intelligence cannot yet capture are the real differentiators.
The article also recalls an earlier shift in design methodology, when RTL1. resistor-transistor logicSemiconductor device or transistor technology used to control electrical currents and signals.2. register transfer levelRTL is the hardware description layer where design assumptions are often captured.3. Register-Transfer LevelRTL describes the hardware implementation stage targeted by the benchmark. and logic synthesis were initially resisted by established logic designers. Junior engineers adopted the new flow first and demonstrated that, although senior engineers could still achieve better PPA1. power, performance, and areaPPA is the main optimization target for advanced-node designs.2. power, performance, area, synthesis delivered a major productivity gain. The point is that younger engineers can be the ones who test and absorb new methods before they become standard practice.
One example in the text involves a junior engineer being asked to evaluate whether a board-level avionics system could be reduced using newly available programmable logic devices, long before FPGAfield-programmable gate arrayReconfigurable logic device whose internal circuits can be programmed after manufacturing.s existed. The task was not to create a final production design, but to explore a new architecture, study the devices, learn the programming flow and assess certification implications under supervision.
The article concludes that engineering teams need a development path for all levels of staff if AIartificial intelligence is to be integrated sensibly. Senior engineers who spend their time supervising agents cannot also do the work that AIartificial intelligence cannot do, so companies need to think carefully about how junior engineers are trained, where they are placed, and how human and AIartificial intelligence work is structured.