Simulations map a new leakage path in GAAFETs

October 14, 2026

Simulations map a new leakage path in GAAFETs

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Researchers at Sandia National Laboratories and the Luxembourg Institute of Science and Technology have published a technical paper that identifies a leakage pathway in gate-all-around field-effect transistors using predictive first-principles simulation methods.

The study focuses on GAAFETGate-All-Around Field-Effect TransistorsThese transistors wrap the gate around the channel to improve electrostatic control.s, which are positioned as successors to FinFETsFin Field-Effect TransistorsFinFETs are the earlier multi-gate transistor architecture that GAAFETs aim to extend. in advanced semiconductor nodes. Even with improved electrostatic control, the devices show drain current behavior at negative gate voltages that departs strongly from thermionic transport and rises as the gate voltage becomes more negative.

To examine this behavior, the authors used charge-self-consistent NEGFnon-equilibrium Green functionNEGF is a quantum transport framework used to model current flow in nanoscale devices. simulations combined with the CBRcontact block reductionCBR is a computational method that reduces the cost of transport simulations. method. This approach allowed the leakage path to be spatially resolved inside the device structure rather than inferred only from electrical measurements.

The analysis ties the leakage to direct gate-drain tunneling through the high-k dielectric, with DIDBLdrain-induced dielectric barrier loweringDIDBL describes barrier lowering in the dielectric caused by drain bias. contributing by lowering the dielectric barrier under drain bias. The result gives a more detailed picture of how unwanted current can persist in aggressively scaled GAAFETGate-All-Around Field-Effect TransistorsThese transistors wrap the gate around the channel to improve electrostatic control. structures.

The paper is titled “Revealing New Leakage Paths in GAAFETGate-All-Around Field-Effect TransistorsThese transistors wrap the gate around the channel to improve electrostatic control.s using Predictive First-Principles Simulations” and appears as an arXiv preprint from October 2026.

Source: Semiconductor Engineering

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