This week’s semiconductor roundup combined device research, photonic computing, and policy-driven industry investment. On the transistor side, Hong Kong Polytechnic University-led researchers reported a 2D tunnel transistor that switches at lower voltages than conventional MOSFET1. metal-oxide semiconductor field effect transistorVoltage-controlled field-effect transistor with an insulated gate, widely used in integrated circuits.2. metal-oxide-semiconductor field-effect transistorA common transistor type used here as the layout and technology reference.s while retaining strong current performance. The device was demonstrated at room temperature on centimeter-scale silicon substrates and is described as meeting IRDS requirements for next-generation integrated circuits.
In photonics, Tsinghua University researchers presented a fully in-memory photonic computing architecture that merges sensing, processing, and memory on a 7,378-neuron multicore chip. The system was shown in autonomous racing-drone navigation and is aimed at reducing data movement between compute elements and external memory. The same roundup also noted work on 300mm Si photonics and InP expansion as part of broader industry activity.
Another research highlight came from EPFL, where a GaNgallium nitrideGaN is another material platform mentioned for use in different power delivery roles.-on-Si transistor using a polarization superjunction sustained more than 3.4 kV, while associated diodes exceeded 3.9 kV. Separately, Seoul National University-led researchers developed an AIartificial intelligence method that separates overlapping semiconductor defect patterns at the pixel level using only image-level defect labels, pointing to a less annotation-heavy approach to defect analysis.
Beyond research, the week included India’s $13.4 billion Semicon 2.0 push, alongside mentions of SEMICONSemiconductor ConventionSEMICON is the name of an international trade show for the semiconductor industry organized by SEMI. Taiwan and a MediaTek deal in the source roundup. The list also referenced PCIePeripheral Component Interconnect ExpressPCIe is the high-speed serial interconnect standard 6/7 test activity, heterogeneous HBM1. human body modelESD test model that simulates a person discharging static electricity into a component.2. High Bandwidth MemoryHBM is a stacked DRAM architecture designed to provide very high memory bandwidth., Gain-Cell RAM1. random access memoryMemory allowing individual locations to be accessed directly.2. reliability, availability, and maintainabilityReliability-engineering term describing device stress, aging or failure behavior., and edge AIartificial intelligence developer tools, reflecting the breadth of ongoing platform and ecosystem work across the industry.
Several education and workforce items rounded out the week: Intel Foundation and Project Lead The Way announced a $3 million grant for advanced manufacturing careers, AMD and Delhi University launched an AIartificial intelligence training initiative using ROCm, and Pakistan completed a national semiconductor education network under its INSPIRE program. Purdue University also joined a five-university SRCSemiconductor Research Corporation SPARC cohort focused on advanced packaging and system integration research.