This week’s semiconductor news was shaped by a mix of major deals, capacity plans, and process advances. Among the headline items were a large memory transaction, new U.S. chip capacity initiatives, and reported progress at 2 nm and below. The roundup also singled out Huawei’s chip offensive and signs that Chinese equipment makers are taking more share in the market.
At the AIartificial intelligence Infra Summit in Santa Clara, the coverage broadened beyond manufacturing to include infrastructure, physical AIartificial intelligence, edge AIartificial intelligence, servers, and tools. One topic was a RoT solution for data centers and AIartificial intelligence SoCs, pointing to the continuing focus on system-level robustness in large-scale AIartificial intelligence deployments. Other items in the week’s coverage ranged from McKinsey tech trends and major funding rounds to Europe’s AIartificial intelligence infrastructure gaps.
The technical news included several research and development updates. NUS-led researchers described a reconfigurable transistor built from atomically thin MoS2 and ferroelectric HZOhafnium zirconium oxideHZO is the ferroelectric material used to enable multi-level current control. that can act as a logic device, an artificial synapse, or an artificial neuron. Separately, USC is leading a DARPADefense Advanced Research Projects Agency (see ARPA)-funded project on a transistor that uses magnetic spin waves rather than electrical charge, with the stated goal of lowering power and heat while remaining compatible with conventional chip manufacturing.
In quantum computing, the U.S. Department of Energy launched a competition worth up to $215 million for systems with at least 100 logical qubits and hundreds of millions of fault-tolerant operations. Quobly also demonstrated key quantum operations on a chip fabricated by STMicroelectronics, combining silicon spin qubits with FD-SOIFully Depleted Silicon-On-InsulatorA transistor platform that uses a thin buried oxide to improve electrostatic control and reduce power consumption. transistors. Nvidia extended its CUDA-Q platform with an orchestration layer for fault-tolerant quantum applications.
The week’s coverage also noted workforce and policy developments, including a U.S. Department of Energy training prize for universities and a court ruling that temporarily blocked a DHS rule affecting F-1 and J-1 admission periods. On the semiconductor labor side, current OPT and STEMscanning transmission electron microscope/microscopyMicroscopy technique for imaging and characterizing fine material structures. OPT pathways remain in place for now.