Researchers at Peking University have introduced a structure-aware modeling framework for predicting thermal conductivity in advanced BEOLback end-of-lineManufacturing stage that builds interconnects and dielectric layers above the transistors. interconnect stacks. The work addresses a growing problem in modern integrated circuits: as back-end wiring becomes more complex, thermal conductivity can no longer be treated as a simple material property independent of layout and stack structure.
The reported framework is built on layer-resolved thermal measurements and uses time-domain thermoreflectance with about 100 nm depth resolution. From a compiled dataset of more than 40 experimentally measured layer-resolved κ values across different BEOLback end-of-lineManufacturing stage that builds interconnects and dielectric layers above the transistors. layers, the team derived an empirical relationship between interconnect structure and thermal conductivity that is intended to be generalizable across advanced technology nodes.
Beyond the layer-level correlation, the paper also adds an intra-layer three-dimensional κ distribution model. This part combines effective medium theory with realistic layout descriptions to capture spatial variations of thermal conductivity within practical interconnect layers rather than assuming a uniform value across the stack.
The result is a measurement-backed modeling framework that can support predictive thermal analysis of advanced interconnect stacks and 3D IC1. integrated circuitIC is the common term for an integrated circuit.2. ion chromatographyAnalytical method that separates and identifies the components of a mixture.s. The source text does not claim a new fabrication process or material system, but it does show that detailed thermal measurements can be converted into a quantitative structure-to-κ model for BEOLback end-of-lineManufacturing stage that builds interconnects and dielectric layers above the transistors. design and analysis.