AIartificial intelligenceAI stands for artificial intelligence is emerging as a structural change for the semiconductor industry because it is affecting not only demand, but also the way manufacturing, test and supply chain operations are run. The industry has faced major shifts before, yet mobile and the internet mainly changed what was sold. AIartificial intelligenceAI stands for artificial intelligence changes the tools, data flows and collaboration models underneath the business.
The current pressure is framed around efficiency. Semiconductor companies are being pushed to get more compute out of every data center, more insight out of every unit of manufacturing data and more control out of a globally distributed supply chain. That demand is already reshaping product strategy, with foundation model companies and hyperscalers designing their own silicon and treating energy efficiency as a primary requirement.
The scale of the opportunity is large. Device revenue is projected to rise from US$975 billion (approximately €870 billion) in 2025 to about US$2.3 trillion (approximately €2.1 trillion) in 2030, with data centers and servers accounting for 58 % of that growth. Installed AIartificial intelligenceAI stands for artificial intelligence data center capacity of 45–60 GW in 2026 is projected to reach 100–160 GW by 2030. Using 150000–200000 wafers per gigawatt, roughly half for HBM1. human body modelESD test model that simulates a person discharging static electricity into a component.2. High Bandwidth MemoryHBM is a stacked DRAM architecture designed to provide very high memory bandwidth., that implies 9.6–17.5 million additional wafers and 16–29 new fabs of 50000 wafer starts per month; at the leading edge, where a modern logic fab is closer to 20000 wafer starts, the fab count could be even higher.
That growth does not solve the core problem, however. The harder task is getting more compute from the installed base, especially as AIartificial intelligenceAI stands for artificial intelligence workloads move from training to inference. Training can keep a chip near its design point, while a GPUgraphics processing unitA GPU is a parallel graphics processor widely used for AI acceleration. doing inference can spend more than 90 % of its power on memory updates and idle time. The text also points to a remaining factor-of-a-million headroom in computing efficiency, based on Richard Feynman’s lectures on fundamental limits.
On the manufacturing side, custom designs are proliferating and production volumes are becoming smaller across more products. New product introduction testing is expanding into production, with broader datasets and test programs that can run to millions of test items. New technologies such as co-packaged optics also mean that more than electrons are moving through the line, which increases the need for process control and cross-domain coordination.
For manufacturing data, the central challenge is not the lack of AIartificial intelligenceAI stands for artificial intelligence, but the mismatch between generic models and semiconductor-specific context. Large language models can reason about wafer maps, parametric test, bins, lots, SPCstatistical process controlStatistical monitoring of manufacturing processes to detect deviations early. charts, etch-rate drift and failure mechanisms, but they do not know company-specific IP1. image placement2. Internet protocolInterface or communications concept for transmitting data between devices and systems.3. Intellectual PropertyIP denotes licensable semiconductor design blocks or technology elements., historical baselines, recipes, design rules, test flows or bin definitions unless those are explicitly provided and validated. A recurring problem is that the useful signal was already in the data before the yield event happened.
The scale of private manufacturing data makes that harder. Leading fabless companies and giga-scale foundries can hold petabytes of data per site across more than 20 data domains and more than 100 file formats each. A new 3D-IC3D Integrated Circuit3D-IC refers to integrated circuits with three-dimensionally stacked components. can involve 2–10 million test parameters at NPI, while even modest mixed-signal test programs can accumulate around 200 TBtied body of analytics data. One foundry case described analysis of 2–3 trillion sort parameters across roughly 2000 products every week, with more than 100000 features per unit.
The proposed response is workflow-based AIartificial intelligenceAI stands for artificial intelligence: use LLM1. local linear models2. Large Language ModelThe model class referenced in the long-context serving demo.s to create analytical workflows in Python, then let those workflows run repeatable semiconductor analyses on a scalable backend. The model builds the analysis rather than performing it every time. That reduces token consumption and energy use dramatically; for a repeated 100000-row, 10-column analysis sample, the text contrasts a direct LLM1. local linear models2. Large Language ModelThe model class referenced in the long-context serving demo. approach at 30 K tokens and 30 Wh per run with a stored workflow that can execute at about 0.02 Wh per run. The same architecture also keeps customer data isolated from the model while preserving repeatability and auditability.
Supply chain efficiency is the third pressure point. In hybrid packaging, wafer fabrication, die preparation, wafer bonding, die stacking, TSV1. through silicon viaVertical conductive connection through silicon used to interconnect stacked dies.2. through-silicon viaAn interconnect technology used in HBM and HBF structures. and interconnect, advanced packaging, test and metrology are separate stages spread across different facilities, companies and countries. Secure network infrastructure is used to control what data leaves a factory, what returns, and how it is scanned and audited, reflecting a shift from human collaboration to agentic collaboration across the semiconductor supply chain.