Edge placement error is increasingly being treated as a system-level issue rather than a narrow lithography number. At the SPIESociety of Photo-Optical Instrumentation EngineersThe conference organizer named in the event context. Photomask Technology + Extreme Ultraviolet Lithography conference, the discussion centered on how mask effects, scanner behavior, resist, etch, metrology, OPC1. optical particle counterMeasurement or inspection concept for tracking defects and process variations in manufacturing.2. optical proximity correctionOPC is a lithography correction flow used to improve pattern fidelity on silicon., and downstream integration all contribute to the final placement error seen on the wafer.
The core message was that local optimization is no longer sufficient. As pitch scaling becomes more difficult, tighter control of placement, variability, and pattern fidelity is becoming one of the main remaining paths for continued scaling. The challenge is broad: mask three-dimensional effects, absorber profile, sidewall angle, critical-dimension uniformity, registration, scanner behavior, resist variability, stochastic effects, process-induced stress, and even wafer or die bonding can all shift an edge or alter its electrical impact.
OPC1. optical particle counterMeasurement or inspection concept for tracking defects and process variations in manufacturing.2. optical proximity correctionOPC is a lithography correction flow used to improve pattern fidelity on silicon. was described as both a major source of EPEedge placement errorA measure of how accurately a patterned edge lands at its intended position on the wafer. and the likeliest place for future reduction. That reflects how much of the current manufacturing complexity is still absorbed into empirical corrections, rule tables, or a generic etch term. The problem is that residual error is increasingly large relative to the remaining process window, so EDA1. electronic design automationSoftware tools for designing, simulating, verifying and laying out electronic circuits.2. equipment data acquisitionSystem or method for collecting, storing, exchanging or analyzing data. has to model the manufacturing system more completely instead of collapsing multiple effects into one correction bucket.
Better data is not the same as more data. A single SEM1. scanning electron microscopyImaging technique that scans a focused electron beam across a sample.2. specific equipment modelComputational method or mathematical model for simulating, describing or optimizing technical systems.3. scanning electron microscopeSEM images are used for high-resolution inspection and measurement. image carries far more information than one extracted CDcritical dimensionKey measured feature size of a semiconductor pattern, such as a line width., including contours, profiles, roughness, placement, local geometry, and pattern context. At the same time, no fab can measure everything. The practical goal is to use OPC1. optical particle counterMeasurement or inspection concept for tracking defects and process variations in manufacturing.2. optical proximity correctionOPC is a lithography correction flow used to improve pattern fidelity on silicon. and process models to identify the most wafer-sensitive patterns, rank hotspots, and translate those sensitivities into mask and wafer metrology requirements.
Artificial intelligence was presented as a major opportunity for future EPEedge placement errorA measure of how accurately a patterned edge lands at its intended position on the wafer. reduction, but only when paired with physics and validation. Machine learning can capture residual systematic behavior that is difficult to model directly, while agentic systems can coordinate optimization across separate domains. The requirement is explainable AIartificial intelligence anchored by simulation, validated with suitable metrology, bounded by known physics, and monitored for the conditions under which it can safely be used.
The proposed starting point for agentic systems is a set of bounded engineering problems: reducing global CDU1. chemical dispense unit2. critical dimension uniformityA metric describing how uniformly critical dimensions are controlled across patterns or wafers., selecting robust mask geometries, optimizing source and mask together, prioritizing metrology, or linking pattern variation to electrical impact. For each of these, the objective, available data, adjustable knobs, physical constraints, and validation criteria have to be defined before the workflow is expanded.
Ultimately, the point is not to minimize geometric error everywhere. EDA1. electronic design automationSoftware tools for designing, simulating, verifying and laying out electronic circuits.2. equipment data acquisitionSystem or method for collecting, storing, exchanging or analyzing data. must connect EPEedge placement errorA measure of how accurately a patterned edge lands at its intended position on the wafer. decisions to power, performance, area, cost, and yield, and it must do so with electrical simulation, stochastic analysis, lithography, mask optimization, process modeling, and design technology co-optimization in one decision flow. The EPEedge placement errorA measure of how accurately a patterned edge lands at its intended position on the wafer. problem is expected to persist as the industry moves toward three-dimensional integration, curvilinear masks, high-NAnumerical apertureOptical measure of the light-gathering angle of a lens, related to resolution. lithography, and tighter coupling between manufacturing and electrical performance.
Foundries and IDMintegrated device manufacturerAn IDM makes chips and also controls major parts of the manufacturing flow.s were identified as the organizations best positioned to connect mask, scanner, process, device, and yield data, but the needed collaboration also extends to mask makers, metrology suppliers, and lithography equipment providers. The practical direction is clear: build fuller physical representations, make metrology more device-relevant, combine AIartificial intelligence with rigorous simulation, apply agentic systems first to bounded problems, and connect every EPEedge placement errorA measure of how accurately a patterned edge lands at its intended position on the wafer. decision to manufacturability and product outcome.