Intel Foundry is positioning connected metrology as the foundation for more autonomous manufacturing. The company’s SEMICONSemiconductor ConventionSEMICON is the name of an international trade show for the semiconductor industry organized by SEMI. West 2026 presentations describe a roadmap that ties together measurement, defect classification, thermal modeling, automation, and standards, with yield, quality, and factory autonomy as the intended outcomes.
The central claim is that measuring individual process steps is no longer sufficient as devices become more complex and packaging integrates more functions. Intel Foundry argues that manufacturers need links between fabrication, assembly, and test so that decisions in one stage can be evaluated against their impact on the finished device. In that model, metrology is not only a pass/fail gate for a single step, but also a way to trace relationships among materials, equipment conditions, contamination, and downstream defects.
That shift matters because earlier detection could prevent compromised material from moving further through the line. If measurements are properly connected to the conditions that produced them, engineers can identify problems sooner, avoid wasted capacity, and reduce the time spent investigating failures. The practical requirement is reliable traceability between the measurement result and the production context behind it.
Advanced packaging raises the technical stakes. Chiplets, hybrid bonding, and stacked devices create tighter dependence between assembly steps and final device value. A defective component found only after assembly can undermine the value of already integrated parts, so die selection before assembly and the connection of test results to manufacturing history become more important.
Intel Foundry describes its Advanced Chiplet Test services as part of this broader approach. Predictive die classification, intelligent die pairing, optical testing, and yield analytics are intended to feed manufacturing decisions earlier in the flow, when engineers still have room to prevent expensive downstream issues.
AIartificial intelligence is part of the plan, but not as an unchecked decision-maker. Intel Foundry’s automatic defect classification work uses an agentic workflow to help engineers with logs, knowledge retrieval, investigations, and recipe reviews, while keeping human approval checkpoints in place. The distinction is important: a statistical correlation does not by itself prove causation or justify a process change.
The company is also exploring physics-informed thermal modeling, combining AIartificial intelligence with heat-transfer physics to improve prediction quality while reducing the amount of training data needed. For power-dense devices and heterogeneous packages, better thermal understanding could support design, test, and reliability work, although the approach still needs validation across materials, architectures, workloads, and operating conditions.
Infrastructure is the other requirement. Intel Foundry says data isolated inside incompatible equipment platforms limits visibility and makes deployment across factories harder. Hardware-independent automation, connected systems, edge computing, and open standards are presented as ways to exchange information more effectively. The SATAS consortium is highlighted as one effort to develop interoperable architectures and automation frameworks for manufacturing, assembly, and test.
The overall message is that semiconductor autonomy depends on dependable evidence, coordinated systems, and explicit responsibility for consequential decisions. Intel Foundry’s roadmap remains a set of research directions and emerging capabilities, but it makes clear that connected measurement and analysis are meant to improve yield, reduce scrap, shorten cycle time, and lower engineering workload.