Ayar Labs and GUC have presented thermal co-simulation results for a co-packaged optics platform built around a large multi-chip package for AIartificial intelligence systems. The study focuses on whether optical engines can remain stable next to very high-power processors inside a single package, where thermal behavior becomes a primary design constraint.
The package integrates Ayar Labs’ TeraPHY optical engines into GUC’s advanced packaging and ASICapplication-specific integrated circuitIntegrated circuit customized for a specific task flow. The XPU1. accelerator processing unitXPU is used here for the compute package that hosts multiple processing elements.2. accelerated processing unitA collective term for a high-performance processor in the package architecture described. multi-chip package replaces conventional electrical links with optical engines attached directly to the organic substrate and is described as supporting a full-duplex optical interface of more than 100 Tbps. Communication between the optical engines and the I/O chiplets uses UCIe-S1. Universal Chiplet Interconnect Express - StreamingUCIe-S carries bandwidth-oriented communication between chiplets in the package.2. Universal Chiplet Interconnect Express - StandardIn this design, the interface connects the optical engines to the I/O chiplets., while UCIe-AUniversal Chiplet Interconnect Express - AdvancedUCIe-A is used for communication between the I/O chiplet and the main AI die. connects the I/O chiplets to the main AIartificial intelligence die through local silicon interconnect bridges.
The package is large at 105 mm × 140 mm and contains 2 XPU1. accelerator processing unitXPU is used here for the compute package that hosts multiple processing elements.2. accelerated processing unitA collective term for a high-performance processor in the package architecture described.s, 8 HBM4 memory modules, 4 I/O chiplets, and 8 TeraPHY optical engines. The total power envelope exceeds 3 kW, with about 1,500 W attributed to the AIartificial intelligence processors alone. The design uses a 9-2-9 layer substrate structure, and the package-level implementation also includes a stiffener that supports detachable fiber connections while addressing mechanical stress and warpage.
Thermal co-simulation was used to map power distribution, identify hotspots, and evaluate thermal crosstalk across the chiplets and optical engines. The flow covered both air-cooled and liquid-cooled environments and was applied from early design stages through sign-off constraints. The reported thermal targets were HBM4 below 95°C, SoC below 125°C, and the optical engine below 100°C.
A standard air fin heatsink was tested at 5 m/s and 6 m/s at 25°C, but it did not meet the specification; temperatures rose above the limit for all components except the I/O die. A thermal resistance analysis then identified the required targets for the CoWoS-L-based package: RSAthermal resistance to ambientdescribes the thermal resistance of a component to the ambient environment.-ASICapplication-specific integrated circuitIntegrated circuit customized for a specific task at or below 0.008 K/W and RSAthermal resistance to ambientdescribes the thermal resistance of a component to the ambient environment.-OE at or below 0.15 K/W.
A liquid-cooled impingement-type cold plate met the specification at 4.5 LPMliters per minuteVolumetric flow rate of the coolant in liquid cooling.. The design used optimized fin dimensions of 0.15 mm thickness and 2.4 mm height for the ASICapplication-specific integrated circuitIntegrated circuit customized for a specific task, and 3.0 mm height for the optical engine, together with thermal interface materials rated at K = 5.2 W/mK. Pressure drops were reported at 11.2 kPa for the ASICapplication-specific integrated circuitIntegrated circuit customized for a specific task cold plate and 18.8 kPa for the optical engine cold plate.
The results show that the optical engine can stay below 100°C while the package dissipates more than 3 kW in total. A follow-up simulation campaign will examine dynamic workloads to capture temperature transients under real operating conditions.