Short updates from the semiconductor industry, with context and links to the relevant chapters. RSS
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August 31, 2026 Circuit Design & Applications
A single-stage boost converter is often considered practical only up to about 8:1 to 9:1, but the limits depend strongly on topology, switching mode, device parasitics, and controller duty-cycle capability. Texas Instruments shows a 3 V to 42 V GaN reference design reaching a 14:1 ratio at more than 84% efficiency.
August 31, 2026 Research
Huawei, ETH Zürich and HUST present FLINT, a workload-driven HBF substrate that treats High Bandwidth Flash as a capacity tier for LLM inference when accelerator memory is the bottleneck.
August 31, 2026 Artificial intelligence
Semiconductor Engineering argues that AI-generated design and verification outputs cannot be taken at face value. The central issue is not only whether the result looks plausible, but whether its provenance, assumptions, and properties have been checked well enough to catch errors, omissions, and even deliberate cheating.
September 1, 2026 Artificial intelligence
Artificial intelligence is no longer only a tool for chip design and manufacturing. It is also becoming a core target of strategic patent filings, with the competitive map shifting in clear geopolitical ways.
September 1, 2026 Research
imec reports two process modules that push CFET devices closer to manufacturable logic scaling: an improved backside-contact scheme for better bottom-device current and a new dipole-middle gate-stack integration method for multi-Vt tuning in nanosheet- and CFET-based transistors.
September 1, 2026 Research
imec reports two process advances for CFET devices: a backside-contact module that improves bottom pFET performance, and a gate-stack scheme for multi-Vt tuning with lower thermal budget. The work targets manufacturable integration paths beyond GAA nanosheet transistors.
September 1, 2026 Design & EDA
Hardware-assisted verification is moving from a premium option to a practical tool for more SoC projects. FPGA-based prototyping helps teams run software stacks on realistic hardware models and catch hardware-software issues before silicon arrives.
September 1, 2026 Design & EDA
Hardware-assisted verification is moving beyond expensive emulator setups as FPGA-based prototyping gives teams a faster way to validate complex SoC hardware and software together before silicon is available.
September 1, 2026 Devices & Products
Lithium-ion batteries with multiple voltage levels can be recharged during work breaks through short charging cycles, avoiding the need for battery swaps while preserving cycle life.
September 1, 2026 Devices & Products
Lithium-ion batteries with multiple voltage levels can be recharged during short work breaks, offering an alternative to battery swapping without reducing cycle life.
September 1, 2026 Research
Recent work reports a GaN transistor architecture that blocks nearly 4 kV on silicon while keeping resistance low, a magnesium-based method for low-resistance p-GaN contacts, and a diamond interposer that spreads heat in GaN power devices.
September 1, 2026 Research
New work from EPFL reports a GaN transistor architecture that approaches 4 kV breakdown while avoiding the usual trade-off with on-state resistance. Separate studies show an ultrathin magnesium process for low-resistance p-GaN contacts and a diamond interposer that spreads heat away from GaN transistors in a 3D stack.
September 1, 2026 Artificial intelligence
Generative AI is making synthetic media more convincing, and the problem is no longer limited to video manipulation. EDN highlights how advancing fakery methods can also undermine technical verification and make false claims harder to spot.
September 1, 2026 Devices & Products
In data-center optical scale-up links, the largest avoidable losses are not in the fiber itself but at the connector interface and inside the silicon-photonics platform.
September 3, 2026 Artificial intelligence
A new methodology argues that modern electronic design can no longer rely mainly on heuristics and experience. By combining optimization, automation, and AI, engineering teams can explore larger design spaces, standardize analyses, and extract more useful insight from simulation data.