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October 14, 2026 Companies & Market

NVIDIA pushes CUDA-X libraries into chip design, simulation and fab operations

NVIDIA is extending its CUDA-X stack into semiconductor design, manufacturing and test, with new tools such as cuPotential, NanoVDB and NPP aimed at AI-defined fabs. Early-access results cited in the announcement include a 2-3x gain for cuPotential over already GPU-optimized workflows, 30x faster simulation for Lam Research with NanoVDB, and 50x faster image-processing performance for a new KLA kernel.

Co-packaged optics shifts from concept to production planning

At Ayar Labs’ CPO Summit, Meta, Broadcom, AMD, MediaTek, Lumentum, Wiwynn and Upscale AI focused on whether the optical interconnect ecosystem can be ready for a 2028 demand surge. The discussions centered on manufacturability, supply-chain scale, interoperability and the OCI MSA as co-packaged optics moves toward high-volume deployment.

October 14, 2026 Companies & Market

Renesas launches first 100-V E-mode GaN FET family with lower switching FOM

Renesas Electronics has introduced its first family of 100-V enhancement-mode discrete GaN power transistors, targeting high-power-density designs in AI data centers, humanoid robotics, and factory automation. The devices are claimed to cut hard-switching FOM by up to 35% and soft-switching FOM by up to 63% versus comparable GaN parts, while using a silicon-compatible FCLGA footprint to ease migration from silicon MOSFET layouts.

Beyond Lithography: 3D Scaling Raises New Material and Process Demands

ASM International is highlighting how the move toward more complex 3D devices is shifting attention beyond lithography and onto the materials and process steps needed to build them reliably.

SK hynix presents 3D FeNAND co-optimization for analog compute-in-memory

SK hynix has outlined a 3D FeNAND approach for analog compute-in-memory that co-optimizes cell, non-cell, and page schemes. The work targets lower data-movement overhead in AI systems and reports large gains in throughput and energy efficiency over conventional 3D NAND-based architectures.

Read more → · Fundamentals

October 14, 2026 Research

Simulations map a new leakage path in GAAFETs

Researchers have used first-principles simulations to spatially resolve a leakage pathway in gate-all-around field-effect transistors. The work links the off-state drain current at negative gate bias to direct gate-drain tunneling through the high-k dielectric, with drain-induced dielectric barrier lowering helping to усилify the effect.

Applied Materials sees multi-year WFE growth as AI buildout expands demand

Applied Materials expects the AI infrastructure buildout to keep wafer fab equipment spending on a strong multi-year upswing through 2030. The company points to leading-edge foundry-logic, DRAM and advanced packaging as the main growth engines and says its positions in process equipment, eBeam tools and services should support higher market share and profitability.

Read more → · Fundamentals

October 12, 2026 Artificial intelligence

Low-Voltage Foundation IP Targets the Edge AI Power Wall

As AI workloads shift toward endpoint hardware, edge devices must deliver real-time inference within tight power and thermal limits. With traditional silicon scaling no longer providing the same power-density gains, design teams are increasingly relying on low-voltage foundation IP to reduce energy demand while keeping performance usable at the edge.

Samsung reportedly locks in most of 2027 memory output through long-term deals

Samsung Electronics has reportedly committed 75–80% of its 2027 memory supply, including high-bandwidth memory (HBM), to long-term agreements. Nvidia, Google and Microsoft were among the major customers said to have largely finalized contracts.

Read more → · Fundamentals

October 12, 2026 Companies & Market

Polar and imec’s IC-Link expand 8-inch GaN manufacturing for high-voltage power devices

Polar Semiconductor and IC-Link by imec are teaming up to bring 8-inch production of enhancement-mode GaN devices to market. The offering is based on imec’s GaN-on-Si process, device and epitaxy know-how and targets 40 V to 650 V applications, with planned expansion toward lower and higher voltages for future data center conversion needs.

Read more → · Compound Semiconductors

October 12, 2026 Companies & Market

‘Filter Moore’s Law’ drives record revenue at Taiwan’s Ye Siang Enterprise

As process nodes keep shrinking, semiconductor fabs are tolerating less airborne molecular contamination, and filtration demand is rising faster than wafer output. Ye Siang Enterprise, a Taiwan-based leader in AMC filtration, says that effect is now translating into record revenue.

Applied Materials opens $5 billion EPIC Center for semiconductor R&D and commercialization

Applied Materials has unveiled the EPIC Center in Sunnyvale, a $5 billion facility for collaborative semiconductor process technology and manufacturing equipment R&D. The company says the site is built to compress the path from materials innovation to high-volume manufacturing for next-generation chips in the AI era.

GlobalFoundries unveils FDX Fusion FD-SOI roadmap for Physical AI

GlobalFoundries has outlined FDX Fusion, a new FD-SOI platform aimed at Physical AI workloads and scheduled for manufacturing in Dresden in 2028. The first generation is expected to deliver seven-nanometer-class digital performance, more than 2x density versus first-generation FDX and RF operation up to 0.5 THz ft/fmax, while combining low leakage, analog and mixed-signal functions, embedded non-volatile memory and in-memory computing.

Read more → · Fundamentals

October 9, 2026 Companies & Market

GlobalFoundries reaches Dresden expansion milestone and plans FDX Fusion for Physical AI

GlobalFoundries has marked the topping-out of its SPRINT expansion in Dresden and set out FDX Fusion, a next-generation FD-SOI platform planned for development and manufacturing at the site. The expansion is intended to lift annual 300 mm wafer output to more than one million by the end of 2028, while FDX Fusion targets energy-efficient computing for demanding Physical AI workloads.

CPO test flows are being reshaped by connector diversity and tighter optical alignment

Test vendors are adapting their production tools for near-packaged and co-packaged optics as data center deployments move toward higher volume. The main pressure points are optical alignment, connector uncertainty, thermal load, and the lack of optical design-for-testability in today’s flows.